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A Low-Complexity and High-Throughput RTL Design of a BCH (15,7) Decoder

Journal of ICT Research and Applications (JICTRA) · Vol. 6 No. 2 (2013) · pp. 112–130

DOI
10.5614/itbj.ict.2012.6.2.2
ISSN
2338-5499, 2337-5787
Published
2013-09-13
Publisher
DRI - ITB
Language
eng

Abstract

The Bose, Chaudhuri and Hocquenghem (BCH) codes form a large class of powerful random-error correcting cyclic codes. However, the implementation of its decoder requires high-complexity computation resources with a huge number of sequential circuits. This paper presents a low-complexity register transfer level (RTL) circuit design of a BCH decoder. In accordance with the table relationship between the syndrome and the error bit position, we propose a circuit that is mostly occupied by combinational elements without any sequential evolvement. Therefore the designed system has a low complexity and high throughput properties. The implementation of the BCH (15,7)decoder on Virtex 5 FX70TFF1136 requires 77 look-up tables (LUTs) with the maximum throughput reaching 1.7 Gbps.

Collaboration network of the authors

4 authors · 4 co-authorship links

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  • Islamic University of Indonesia
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
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Co-authorOrganisationJoint articles
Mohammad Brado FrasetyoIslamic University of Indonesia1
Elvira Sukma WahyuniIslamic University of Indonesia1
Muhammad IrfanIslamic University of Indonesia1

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

Metadata source: OAI-PMH (metadata jurnal) https://journals.itb.ac.id/index.php/jictra/oai, first harvested 26 Okt 2026, last seen 26 Okt 2026.
Original metadata (oai_dc) 
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	<dc:title xml:lang="en-US">A Low-Complexity and High-Throughput RTL Design of a BCH (15,7) Decoder</dc:title>
	<dc:creator>Setiawan, Hendra</dc:creator>
	<dc:description xml:lang="en-US">The  Bose,  Chaudhuri  and  Hocquenghem  (BCH)  codes  form  a  large class  of  powerful  random-error  correcting  cyclic  codes.  However,  the implementation  of  its  decoder  requires  high-complexity  computation  resources with a huge number of sequential circuits. This paper presents a  low-complexity register transfer level (RTL) circuit design of a BCH decoder. In accordance with the  table  relationship  between  the  syndrome  and  the  error  bit  position,  we propose  a  circuit that  is  mostly occupied by combinational elements without any sequential evolvement. Therefore the designed  system has a  low complexity and high  throughput  properties.  The  implementation  of  the  BCH  (15,7)decoder  on Virtex  5  FX70TFF1136  requires  77  look-up  tables  (LUTs)  with  the  maximum throughput reaching 1.7 Gbps.</dc:description>
	<dc:publisher xml:lang="en-US">DRI - ITB</dc:publisher>
	<dc:date>2013-09-13</dc:date>
	<dc:type>info:eu-repo/semantics/article</dc:type>
	<dc:type>info:eu-repo/semantics/publishedVersion</dc:type>
	<dc:type xml:lang="en-US">Peer-reviewed Article</dc:type>
	<dc:format>application/pdf</dc:format>
	<dc:identifier>https://journals.itb.ac.id/index.php/jictra/article/view/224</dc:identifier>
	<dc:identifier>10.5614/itbj.ict.2012.6.2.2</dc:identifier>
	<dc:source xml:lang="en-US">Journal of ICT Research and Applications; Vol. 6 No. 2 (2012); 112-130</dc:source>
	<dc:source>2338-5499</dc:source>
	<dc:source>2337-5787</dc:source>
	<dc:language>eng</dc:language>
	<dc:relation>https://journals.itb.ac.id/index.php/jictra/article/view/224/218</dc:relation>
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