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Performance Evaluation of Nanoscale Single- and Dual-Gate MESFETs Using COMSOL Multiphysics

Journal of ICT Research and Applications (JICTRA) · Vol. 20 No. 1 (2026) · pp. 55–72

DOI
10.5614/itbj.ict.res.appl.2026.20.1.4
ISSN
2338-5499, 2337-5787
Published
2026-06-30
Publisher
DRI - ITB
Language
eng

Abstract

In this work, a comparative numerical simulation of single-gate and double-gate depletion mode GaAs MESFETs in the nanometer domain using COMSOL Multiphysics was carried out. The objective was to evaluate the significance of multi-gate structures based on electrostatic control capability in terms of performance improvement in Schottky gate MESFETs. Four models were considered, including a traditional single-gate model, an analogous double-gate model, and their corresponding reduced scale models. Comparisons were made in terms of the concentration of electrons and output response depending on the value of the gate bias voltage. There were almost no differences between the two models when scaled at the same dimensions. The reduced dual-gate device exhibited lower leakage current and superior channel control compared to its single-gate counterpart, particularly with higher drain bias applied. This suggests that while the dual-gate design may not be advantageous in all dimensions, it proves more effective when MESFET structures are aggressively scaled, indicating that dual-gate configurations are preferable for nanoscale GaAs MESFETs operating in regimes where electrostatic degradation is significant.

Keywords

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4 authors · 6 co-authorship links

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Metadata source: OAI-PMH (metadata jurnal) https://journals.itb.ac.id/index.php/jictra/oai, first harvested 26 Okt 2026, last seen 26 Okt 2026.
Original metadata (oai_dc)
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	<dc:title xml:lang="en-US">Performance Evaluation of Nanoscale Single- and Dual-Gate MESFETs Using COMSOL Multiphysics</dc:title>
	<dc:creator>Bakrshoom, Odai M. </dc:creator>
	<dc:creator>Alharbi, Mohammed F. </dc:creator>
	<dc:creator>Nazer, Mohammed S. </dc:creator>
	<dc:creator>Elngar, Ahmed M.A.A.</dc:creator>
	<dc:subject xml:lang="en-US">COMSOL multiphysics</dc:subject>
	<dc:subject xml:lang="en-US">dual-gate MESFET</dc:subject>
	<dc:subject xml:lang="en-US">electrostatic control</dc:subject>
	<dc:subject xml:lang="en-US">GaAs MESFET</dc:subject>
	<dc:subject xml:lang="en-US">leakage current</dc:subject>
	<dc:subject xml:lang="en-US">nanoscale transistor</dc:subject>
	<dc:description xml:lang="en-US">In this work, a comparative numerical simulation of single-gate and double-gate depletion mode GaAs MESFETs in the nanometer domain using COMSOL Multiphysics was carried out. The objective was to evaluate the significance of multi-gate structures based on electrostatic control capability in terms of performance improvement in Schottky gate MESFETs. Four models were considered, including a traditional single-gate model, an analogous double-gate model, and their corresponding reduced scale models. Comparisons were made in terms of the concentration of electrons and output response depending on the value of the gate bias voltage. There were almost no differences between the two models when scaled at the same dimensions. The reduced dual-gate device exhibited lower leakage current and superior channel control compared to its single-gate counterpart, particularly with higher drain bias applied. This suggests that while the dual-gate design may not be advantageous in all dimensions, it proves more effective when MESFET structures are aggressively scaled, indicating that dual-gate configurations are preferable for nanoscale GaAs MESFETs operating in regimes where electrostatic degradation is significant.</dc:description>
	<dc:publisher xml:lang="en-US">DRI - ITB</dc:publisher>
	<dc:date>2026-06-30</dc:date>
	<dc:type>info:eu-repo/semantics/article</dc:type>
	<dc:type>info:eu-repo/semantics/publishedVersion</dc:type>
	<dc:type xml:lang="en-US">Peer-reviewed Article</dc:type>
	<dc:format>application/pdf</dc:format>
	<dc:identifier>https://journals.itb.ac.id/index.php/jictra/article/view/27600</dc:identifier>
	<dc:identifier>10.5614/itbj.ict.res.appl.2026.20.1.4</dc:identifier>
	<dc:source xml:lang="en-US">Journal of ICT Research and Applications; Vol. 20 No. 1 (2026); 55-72</dc:source>
	<dc:source>2338-5499</dc:source>
	<dc:source>2337-5787</dc:source>
	<dc:source>10.5614/itbj.ict.res.appl.2026.20.1</dc:source>
	<dc:language>eng</dc:language>
	<dc:relation>https://journals.itb.ac.id/index.php/jictra/article/view/27600/7424</dc:relation>
	<dc:rights xml:lang="en-US">Copyright (c) 2026 Journal of ICT Research and Applications</dc:rights>
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