Melola Discovery

← Melola Discovery

Jurnal SINTA 1

Optimal Power Flow using Ant Colony Search Algorithm to Evaluate Load Curtailment Incorporating Voltage Stability Margin Criterion

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 3 No. 5 (2013)

DOI
10.11591/ijece.v3i5.2738
ISSN
2088-8708
Published
2013-10-01
Publisher
Institute of Advanced Engineering and Science

Collaboration network of the authors

3 authors · 3 co-authorship links

Hover or tap a name to highlight its co-authors. Double-click to open the author's page.

  • Prasad V. Potluri Siddhartha Institute of Technology
  • Affiliation unknown
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
Show as table
Co-authorOrganisationJoint articles

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 27 Okt 2026.
Metadata as oai_dc, converted from Crossref 
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>Optimal Power Flow using Ant Colony Search Algorithm to Evaluate Load Curtailment Incorporating Voltage Stability Margin Criterion</dc:title><dc:creator>Kanagasabai, Lenin</dc:creator><dc:creator>Reddy, B. Ravindranath</dc:creator><dc:creator>Kalavathi, M. Surya</dc:creator><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2013-10-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:identifier>https://doi.org/10.11591/ijece.v3i5.2738</dc:identifier><dc:identifier>10.11591/ijece.v3i5.2738</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 3 No 5 (2013)</dc:source><dc:source>2088-8708</dc:source></oai_dc:dc>