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An Area-Optimized Chip of Ant Colony Algorithm Design in Hardware Platform Using the Address-Based Method

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 4 No. 6 (2014)

DOI
10.11591/ijece.v4i6.6923
ISSN
2088-8708
Published
2014-12-01
Publisher
Institute of Advanced Engineering and Science

Collaboration network of the authors

3 authors · 3 co-authorship links · 2 across different organisations

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  • Islamic Azad University of Najafabad
  • Azarbaijan Shahid Madani University
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
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Co-authorOrganisationJoint articles

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 1 Nov 2026.
Metadata as oai_dc, converted from Crossref 
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>An Area-Optimized Chip of Ant Colony Algorithm Design in Hardware Platform Using the Address-Based Method</dc:title><dc:creator>Fard, E. Shafigh</dc:creator><dc:creator>Monfaredi, K.</dc:creator><dc:creator>Nadimi, M. H.</dc:creator><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2014-12-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:identifier>https://doi.org/10.11591/ijece.v4i6.6923</dc:identifier><dc:identifier>10.11591/ijece.v4i6.6923</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 4 No 6 (2014)</dc:source><dc:source>2088-8708</dc:source></oai_dc:dc>