Melola Discovery

← Melola Discovery

Open access Jurnal SINTA 1

Schedulability of Rate Monotonic Algorithm using Improved Time Demand Analysis for Multiprocessor Environment

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 8 No. 1 (2018)

DOI
10.11591/ijece.v8i1.pp429-440
ISSN
2088-8708, 2088-8708
Published
2018-02-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-nc/4.0

Abstract

Real-Time Monotonic algorithm (RMA) is a widely used static priority scheduling algorithm. For application of RMA at various systems, it is essential to determine the system’s feasibility first. The various existing algorithms perform the analysis by reducing the scheduling points in a given task set. In this paper we propose a schedubility test algorithm, which reduces the number of tasks to be analyzed instead of reducing the scheduling points of a given task. This significantly reduces the number of iterations taken to compute feasibility. This algorithm can be used along with the existing algorithms to effectively reduce the high complexities encountered in processing large task sets. We also extend our algorithm to multiprocessor environment and compare number of iterations with different number of processors. This paper then compares the proposed algorithm with existing algorithm. The expected results show that the proposed algorithm performs better than the existing algorithms.

Collaboration network of the authors

5 authors · 6 co-authorship links · 2 across different organisations

Hover or tap a name to highlight its co-authors. Double-click to open the author's page.

  • National Institute of Technology Rourkela
  • KIIT University
  • Affiliation unknown
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
Show as table
Co-authorOrganisationJoint articles
Manmath Kumar BhuyanAffiliation unknown2
Srinivas SethiAffiliation unknown2

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 1 Nov 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>Schedulability of Rate Monotonic Algorithm using Improved Time Demand Analysis for Multiprocessor Environment</dc:title><dc:creator>Das, Leena</dc:creator><dc:creator>Mohapatra, Sourav</dc:creator><dc:creator>Mohapatra, Durga Prasad</dc:creator><dc:description>&lt;jats:p&gt;&amp;lt;p&amp;gt;Real-Time Monotonic algorithm (RMA) is a widely used static priority scheduling algorithm. For application of RMA at various systems, it is essential to determine the system’s feasibility first. The various existing algorithms perform the analysis by reducing the scheduling points in a given task set. In this paper we propose a schedubility test algorithm, which reduces the number of tasks to be analyzed instead of reducing the scheduling points of a given task. This significantly reduces the number of iterations taken to compute feasibility. This algorithm can be used along with the existing algorithms to effectively reduce the high complexities encountered in processing large task sets. We also extend our algorithm to multiprocessor environment and compare number of iterations with different number of processors. This paper then compares the proposed algorithm with existing algorithm. The expected results show that the proposed algorithm performs better than the existing algorithms.&amp;lt;/p&amp;gt;&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2018-02-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v8i1.pp429-440</dc:identifier><dc:identifier>10.11591/ijece.v8i1.pp429-440</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 8 No 1 (2018); 429</dc:source><dc:source>2088-8708</dc:source><dc:source>2088-8708</dc:source><dc:relation>http://ijece.iaescore.com/index.php/IJECE/article/viewFile/10610/8773</dc:relation><dc:rights>http://creativecommons.org/licenses/by-nc/4.0</dc:rights></oai_dc:dc>