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Dynamic Frequency Scaling Regarding Memory for Energy Efficiency of Embedded Systems

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 8 No. 3 (2018)

DOI
10.11591/ijece.v8i3.pp1798-1804
ISSN
2088-8708, 2088-8708
Published
2018-06-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-nc/4.0

Abstract

Memory significantly affects the power consumption of embedded systems as well as performance. CPU frequency scaling for power management could fail in optimizing the energy efficiency without considering the memory access. In this paper, we analyze the power consumption and energy efficiency of an embedded system that supports dynamic scaling of frequency for both CPU and memory access. The power consumption of the CPU and the memory is modeled to show that the memory access rate affects the energy efficiency and the CPU frequency selection. Based on the power model, a method for frequency selection is presented to optimize the power efficiency which is measured using Energy-Delay Product (EDP). The proposed method is implemented and tested on a commercial smartphone to achieve about 3.3% - 7.6% enhancement comparing with the power management policy provided by the manufacturer in terms of EDP.

Collaboration network of the authors

2 authors · 1 co-authorship link

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  • Incheon National University
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  • Same organisation
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Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 1 Nov 2026.
Metadata as oai_dc, converted from Crossref
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