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Full On-chip low dropout voltage regulator with an enhanced transient response for low power systems

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 9 No. 6 (2019)

DOI
10.11591/ijece.v9i6.pp4637-4648
ISSN
2088-8708, 2088-8708
Published
2019-12-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-nc/4.0

Abstract

A full on chip low Dropout Voltage Regulator (LDO) with fast transient response and small capacitor compensation circuit is proposed. The novel technique is implemented to detect the variation voltage at the output of LDO and enable the proposed fast detector amplifier (FDA) to improve load transient response of 50mA load step. The large external capacitor used in Conventional LDO Regulators is removed allowing for greater power system integration for system-on-chip (SoC) applications. The 1.6-V Full On-Chip LDO voltage regulator with a power supply of 1.8 V was designed and simulated in the 0.18µm CMOS technology, consuming only 14 µA of ground current with a fast settling-time LNR(Line Regulation) and LOR(Load regulation) of 928ns and 883ns respectively while the rise and fall times in LNR and LOR is 500ns.

Collaboration network of the authors

20 authors · 73 co-authorship links · 15 across different organisations

Hover or tap a name to highlight its co-authors. Double-click to open the author's page.

  • Sidi Mohamed Ben Abdellah University
  • Université Privée de Fès
  • Université du Québec
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
Show as table
Co-authorOrganisationJoint articles
Karim El KhadiriSidi Mohamed Ben Abdellah University5
Ahmed TahiriSidi Mohamed Ben Abdellah University5
Mounir OuremchiSidi Mohamed Ben Abdellah University3
Mustapha El AlaouiSidi Mohamed Ben Abdellah University3
Fouad FarahSidi Mohamed Ben Abdellah University2
Rachid El AlamiSidi Mohamed Ben Abdellah University2
Mohammed Ouazzani-JamilUniversité Privée de Fès2
Abdelali El BoutahiriSidi Mohamed Ben Abdellah University1
Ahmed RahaliSidi Mohamed Ben Abdellah University1
Abdellali ElboutahiriSidi Mohamed Ben Abdellah University1
Ahmed LakhssassiUniversité du Québec1
Said El MouzouadeSidi Mohamed Ben Abdellah University1
Ismail BoumedraSidi Mohamed Ben Abdellah University1
Abdelamin DianiSidi Mohamed Ben Abdellah University1
Imane HalkhamsUniversité Privée de Fès1
Youssef El AmraouiSidi Mohamed Ben Abdellah University1

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 27 Okt 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>Full On-chip low dropout voltage regulator with an enhanced transient response for low power systems</dc:title><dc:creator>Ameziane, Hatim</dc:creator><dc:creator>Zared, Kamal</dc:creator><dc:creator>Akhamal, Hicham</dc:creator><dc:creator>Qjidaa, Hassan</dc:creator><dc:description>&lt;jats:p&gt;&amp;lt;span&amp;gt;A full on chip low Dropout Voltage Regulator (LDO) with fast transient response and small capacitor compensation circuit is proposed. The novel technique is implemented to detect the variation voltage at the output of LDO and enable the proposed fast detector amplifier (FDA) to improve load transient response of 50mA load step. The large external capacitor used in Conventional LDO Regulators is removed allowing for greater power system integration for system-on-chip (SoC) applications. The 1.6-V Full On-Chip LDO voltage regulator with a power supply of 1.8 V was designed and simulated in the 0.18µm CMOS technology, consuming only 14 µA of ground current with a fast settling-time LNR(Line Regulation) and LOR(Load regulation) of 928ns and 883ns respectively while the rise and fall times in LNR and LOR is 500ns.&amp;lt;/span&amp;gt;&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2019-12-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v9i6.pp4637-4648</dc:identifier><dc:identifier>10.11591/ijece.v9i6.pp4637-4648</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 9 No 6 (2019); 4637</dc:source><dc:source>2088-8708</dc:source><dc:source>2088-8708</dc:source><dc:relation>http://ijece.iaescore.com/index.php/IJECE/article/viewFile/17830/13152</dc:relation><dc:rights>http://creativecommons.org/licenses/by-nc/4.0</dc:rights></oai_dc:dc>