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A Genetic algorithm for the optimal design of a multistage amplifier

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 10 No. 1 (2020)

DOI
10.11591/ijece.v10i1.pp129-138
ISSN
2088-8708, 2088-8708
Published
2020-02-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-nc/4.0

Abstract

The optimal sizing of analog circuits is one of the most complicated processes, because of the number of variables taken into, to the number of required objectives to be optimized and to the constraint functions restrictions. The aim is to automate this activity in order to accelerate the circuits design and sizing. In this paper, we deal with the optimization of the three stage bipolar transistor amplifier performances namely the voltage gain (A V ), the input impedance (Z IN ), the output impedance (Z OUT ), the power consumption (P) and the low and the high cutoff frequency (F L,F H ), through the Genetic Algorithm (GA). The presented optimization problem is of multi-dimensional parameters, and the trade-off of all parameters. In fact, the passive components (Resistors and Capacitors) are selected from manufactured constant values (E12, E24, E48, E96, E192) for the purpose of reduce the cost of design; also, the intrinsic parameters of transistors (hybrid parameters and the junction capacitances) are considered variables in order not to be limited in design. SPICE simulation is used to validate the obtained result/performances.

Collaboration network of the authors

8 authors · 10 co-authorship links · 5 across different organisations

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  • Sidi Mohamed Ben Abdellah University
  • Université Moulay Ismail de Meknes
  • University of Hassan II Casablanca
  • Affiliation unknown
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
Show as table
Co-authorOrganisationJoint articles
Kritele LoubnaSidi Mohamed Ben Abdellah University2
Hamid BouyghfUniversity of Hassan II Casablanca1
Abdelhadi RaihaniUniversity of Hassan II Casablanca1
Imad El HajjamiAffiliation unknown1
Soufiane AbiUniversité Moulay Ismail de Meknes1

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 27 Okt 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>A Genetic algorithm for the optimal design of a multistage amplifier</dc:title><dc:creator>Beqal, Asmae El</dc:creator><dc:creator>Benhala, Bachir</dc:creator><dc:creator>Zorkani, Izeddine</dc:creator><dc:description>&lt;jats:p&gt;&amp;lt;span lang="EN-US"&amp;gt;The optimal sizing of analog circuits is one of the most complicated processes, because of the number of variables taken into, to the number of required objectives to be optimized and to the constraint functions restrictions. The aim is to automate this activity in order to accelerate the circuits design and sizing. In this paper, we deal with the optimization of the three stage bipolar transistor amplifier performances namely the voltage gain (A&amp;lt;sub&amp;gt;V&amp;lt;/sub&amp;gt;), the input impedance (Z&amp;lt;sub&amp;gt;IN&amp;lt;/sub&amp;gt;), the output impedance (Z&amp;lt;sub&amp;gt;OUT&amp;lt;/sub&amp;gt;), the power consumption (P) and the low and the high cutoff frequency (F&amp;lt;sub&amp;gt;L&amp;lt;/sub&amp;gt;,F&amp;lt;sub&amp;gt;H&amp;lt;/sub&amp;gt;), through the Genetic Algorithm (GA). The presented optimization problem is of multi-dimensional parameters, and the trade-off of all parameters. In fact, the passive components (Resistors and Capacitors) are selected from manufactured constant values (E12, E24, E48, E96, E192) for the purpose of reduce the cost of design; also, the intrinsic parameters of transistors (hybrid parameters and the junction capacitances) are considered variables in order not to be limited in design. SPICE simulation is used to validate the obtained result/performances.&amp;lt;/span&amp;gt;&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2020-02-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v10i1.pp129-138</dc:identifier><dc:identifier>10.11591/ijece.v10i1.pp129-138</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 10 No 1 (2020); 129</dc:source><dc:source>2088-8708</dc:source><dc:source>2088-8708</dc:source><dc:relation>http://ijece.iaescore.com/index.php/IJECE/article/viewFile/15634/13425</dc:relation><dc:rights>http://creativecommons.org/licenses/by-nc/4.0</dc:rights></oai_dc:dc>