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Internal model controller based PID with fractional filter design for a nonlinear process

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 10 No. 1 (2020)

DOI
10.11591/ijece.v10i1.pp243-254
ISSN
2088-8708, 2088-8708
Published
2020-02-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-nc/4.0

Abstract

In this paper, an Internal model Controller (IMC) based PID with fractional filter for a first order plus time delay process is proposed. The structure of the controller has two parts, one is integer PID controller part cascaded with fractional filter. The proposed controller has two tuning factors λ, filter time constant and a, fractional order of the filter. In this work, the two factors are decided in order to obtain low Integral Time Absolute Error (ITAE). The effectiveness of the proposed controller is studied by considering a non linear (hopper tank) process. The experimental set up is fabricated in the laboratory and then data driven model is developed from the experimental data. The non linear process model is linearised using piecewise linearization and two linear regions are obtained. At each operating point, linear first order plus dead time model is obtained and the controller is designed for the same. To show the practical applicability, the proposed controller is implemented for the proposed experimental laboratory prototype.

Collaboration network of the authors

3 authors · 3 co-authorship links

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  • B.S. Abdur Rahman Crescent Institute of Science & Technology
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
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Co-authorOrganisationJoint articles

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 27 Okt 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>Internal model controller based PID with fractional filter design for a nonlinear process</dc:title><dc:creator>P.R., Hemavathy</dc:creator><dc:creator>Shuaib Y, Mohamed</dc:creator><dc:creator>Lakshmanaprabu, S.K.</dc:creator><dc:description>&lt;jats:p&gt;In this paper, an Internal model Controller (IMC) based PID with fractional filter for a first order plus time delay process is proposed. The structure of the controller has two parts, one is integer PID controller part cascaded with fractional filter. The proposed controller has two tuning factors λ, filter time constant and a, fractional order of the filter. In this work, the two factors are decided in order to obtain low Integral Time Absolute Error (ITAE). The effectiveness of the proposed controller is studied by considering a non linear (hopper tank) process. The experimental set up is fabricated in the laboratory and then data driven model is developed from the experimental data. The non linear process model is linearised using piecewise linearization and two linear regions are obtained. At each operating point, linear first order plus dead time model is obtained and the controller is designed for the same. To show the practical applicability, the proposed controller is implemented for the proposed experimental laboratory prototype.&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2020-02-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v10i1.pp243-254</dc:identifier><dc:identifier>10.11591/ijece.v10i1.pp243-254</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 10 No 1 (2020); 243</dc:source><dc:source>2088-8708</dc:source><dc:source>2088-8708</dc:source><dc:relation>http://ijece.iaescore.com/index.php/IJECE/article/viewFile/18107/13438</dc:relation><dc:rights>http://creativecommons.org/licenses/by-nc/4.0</dc:rights></oai_dc:dc>