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Online monitoring of voltage stability margin using PMU measurements

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 10 No. 2 (2020)

DOI
10.11591/ijece.v10i2.pp1156-1168
ISSN
2088-8708, 2088-8708
Published
2020-04-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-nc/4.0

Abstract

With the growing smart grid concept it becomes important to monitor health of the power system at regular intervals for its secure and reliable operation. Phasor Measurement Units (PMUs) may play a vital role in this regard. This paper presents voltage stability monitoring in real time framework using synchrophasor measurements obtained by PMUs. Proposed approach estimates real power loading margin as well as reactive power loading margin of most critical bus using PMU data. As system operating conditions keep on changing, loading margin as well as critical bus information is updated at regular intervals using fresh PMU measurements. Simulations have been carried out using Power System Analysis Toolbox (PSAT) software. Accuracy of proposed Wide Area Monitoring System (WAMS) based estimation of voltage stability margin has been tested by comparing results with loading margin obtained by continuation power flow method (an offline approach for accurate estimation of voltage stability margin) under same set of operating conditions. Case studies performed on IEEE 14-bus system, New England 39-bus system and a practical 246-bus Indian power system validate effectiveness of proposed approach of online monitoring of loading margin.

Collaboration network of the authors

2 authors · 1 co-authorship link

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  • Indian Institute of Technology BHU
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Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 1 Nov 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>Online monitoring of voltage stability margin using PMU measurements</dc:title><dc:creator>Sahu, Pankaj</dc:creator><dc:creator>Verma, M. K.</dc:creator><dc:description>&lt;jats:p&gt;With the growing smart grid concept it becomes important to monitor health of the power system at regular intervals for its secure and reliable operation. Phasor Measurement Units (PMUs) may play a vital role in this regard.  This paper presents voltage stability monitoring in real time framework using synchrophasor measurements obtained by PMUs. Proposed approach estimates real power loading margin as well as reactive power loading margin of most critical bus using PMU data. As system operating conditions keep on changing, loading margin as well as critical bus information is updated at regular intervals using fresh PMU measurements. Simulations have been carried out using Power System Analysis Toolbox (PSAT) software. Accuracy of proposed Wide Area Monitoring System (WAMS) based estimation of voltage stability margin has been tested by comparing results with loading margin obtained by continuation power flow method (an offline approach for accurate estimation of voltage stability margin) under same set of operating conditions. Case studies performed on IEEE 14-bus system, New England 39-bus system and a practical 246-bus Indian power system validate effectiveness of proposed approach of online monitoring of loading margin.&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2020-04-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v10i2.pp1156-1168</dc:identifier><dc:identifier>10.11591/ijece.v10i2.pp1156-1168</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 10 No 2 (2020); 1156</dc:source><dc:source>2088-8708</dc:source><dc:source>2088-8708</dc:source><dc:relation>http://ijece.iaescore.com/index.php/IJECE/article/viewFile/19510/pdf</dc:relation><dc:rights>http://creativecommons.org/licenses/by-nc/4.0</dc:rights></oai_dc:dc>