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New primitives of controlled elements F2/4 for block ciphers

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 10 No. 5 (2020)

DOI
10.11591/ijece.v10i5.pp5470-5478
ISSN
2722-2578, 2088-8708
Published
2020-10-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-nc/4.0

Abstract

This paper develops the cipher design approach based on the use of data-dependent operations (DDOs). A new class of DDO based on the advanced controlled elements (CEs) is introduced, which is proven well suited to hardware implementations for FPGA devices. To increase the hardware implementation efficiency of block ciphers, while using contemporary FPGA devices there is proposed an approach to synthesis of fast block ciphers, which uses the substitution-permutation network constructed on the basis of the controlled elements F2/4 implementing the 2 x 2 substitutions under control of the four-bit vector. There are proposed criteria for selecting elements F2/4 and results on investigating their main cryptographic properties. It is designed a new fast 128-bit block cipher MM-128 that uses the elements F2/4 as elementary building block. The cipher possesses higher performance and requires less hardware resources for its implementation on the bases of FPGA devices than the known block ciphers. There are presented result on differential analysis of the cipher MM-128

Collaboration network of the authors

8 authors · 16 co-authorship links · 7 across different organisations

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  • Academy of Cryptography Techniques
  • Posts and Telecommunications Institute of Technology
  • Thuongmai University
  • Le Quy Don Technical University
  • Affiliation unknown
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
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Co-authorOrganisationJoint articles
Duc Nguyen TanPosts and Telecommunications Institute of Technology1
Hai Nguyen NamPosts and Telecommunications Institute of Technology1
Hiep Nguyen VanAcademy of Cryptography Techniques1

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 27 Okt 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>New primitives of controlled elements F2/4 for block ciphers</dc:title><dc:creator>Hieu, Minh Nguyen</dc:creator><dc:creator>Ngoc, Duy Ho</dc:creator><dc:creator>Ngoc, Canh Hoang</dc:creator><dc:creator>Phuong, Trung Dinh</dc:creator><dc:creator>Cong, Manh Tran</dc:creator><dc:description>&lt;jats:p&gt;This paper develops the cipher design approach based on the use of data-dependent operations (DDOs). A new class of DDO based on the advanced controlled elements (CEs) is introduced, which is proven well suited to hardware implementations for FPGA devices. To increase the hardware implementation efficiency of block ciphers, while using contemporary FPGA devices there is proposed an approach to synthesis of fast block ciphers, which uses the substitution-permutation network constructed on the basis of the controlled elements F2/4 implementing the 2 x 2 substitutions under control of the four-bit vector. There are proposed criteria for selecting elements F2/4 and results on investigating their main cryptographic properties. It is designed a new fast 128-bit block cipher MM-128 that uses the elements F2/4 as elementary building block. The cipher possesses higher performance and requires less hardware resources for its implementation on the bases of FPGA devices than the known block ciphers. There are presented result on differential analysis of the cipher MM-128&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2020-10-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v10i5.pp5470-5478</dc:identifier><dc:identifier>10.11591/ijece.v10i5.pp5470-5478</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 10 No 5 (2020); 5470</dc:source><dc:source>2722-2578</dc:source><dc:source>2088-8708</dc:source><dc:relation>http://ijece.iaescore.com/index.php/IJECE/article/viewFile/20750/14288</dc:relation><dc:rights>http://creativecommons.org/licenses/by-nc/4.0</dc:rights></oai_dc:dc>