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Design new voltage balancing control series connected for HV-IGBT`s

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 11 No. 4 (2021)

DOI
10.11591/ijece.v11i4.pp2899-2906
ISSN
2722-2578, 2088-8708
Published
2021-08-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-sa/4.0

Abstract

The insulated gate bipolar transistors (IGBTs) are widely used in various applications as they require low gate drive power and gate voltage. This paper proposes an active gain circuit to maintain voltage stability of series-connected IGBTs for high voltage applications. The novel gate driver circuit with closed-loops control amplifies the gate signal while restricting the IGBT emitter voltage below a predetermined level. With the proposed circuit, serial-connected IGBTs can replace high-voltage IGBTs (HV-IGBTs) for high-voltage applications through the active control of the gate signal time delay. Closed-loop controls function is to charged current to the gate to restrict the IGBT emitter voltage to a predetermined level. This paper also presents the experiment on the gate driver capability based on a series-connected IGBTs with three IGBTs and a snubber circuit. The experimental results show a voltage offset with active control with a wide variation in load and imbalance conditions. Lastly, the experimental results are validated with the simulation results, where the simulation results agree with the experimental results.

Collaboration network of the authors

6 authors · 15 co-authorship links · 5 across different organisations

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  • Universiti Malaysia Perlis
  • Universiti Tunku Abdul Rahman
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
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Co-authorOrganisationJoint articles

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 27 Okt 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>Design new voltage balancing control series connected for HV-IGBT`s</dc:title><dc:creator>Fahmi, M. I.</dc:creator><dc:creator>Mukmin, M. F.</dc:creator><dc:creator>Liew, H. F.</dc:creator><dc:creator>Wai, C. L.</dc:creator><dc:creator>Aazmi, M. A.</dc:creator><dc:creator>Arshad, S. N. M.</dc:creator><dc:description>&lt;jats:p&gt;&amp;lt;span&amp;gt;The insulated gate bipolar transistors (IGBTs) are widely used in various applications as they require low gate drive power and gate voltage. This paper proposes an active gain circuit to maintain voltage stability of series-connected IGBTs for high voltage applications. The novel gate driver circuit with closed-loops control amplifies the gate signal while restricting the IGBT emitter voltage below a predetermined level. With the proposed circuit, serial-connected IGBTs can replace high-voltage IGBTs (HV-IGBTs) for high-voltage applications through the active control of the gate signal time delay. Closed-loop controls function is to charged current to the gate to restrict the IGBT emitter voltage to a predetermined level. This paper also presents the experiment on the gate driver capability based on a series-connected IGBTs with three IGBTs and a snubber circuit. The experimental results show a voltage offset with active control with a wide variation in load and imbalance conditions. Lastly, the experimental results are validated with the simulation results, where the simulation results agree with the experimental results.&amp;lt;/span&amp;gt;&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2021-08-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v11i4.pp2899-2906</dc:identifier><dc:identifier>10.11591/ijece.v11i4.pp2899-2906</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 11 No 4 (2021); 2899</dc:source><dc:source>2722-2578</dc:source><dc:source>2088-8708</dc:source><dc:relation>http://ijece.iaescore.com/index.php/IJECE/article/viewFile/24590/14891</dc:relation><dc:rights>http://creativecommons.org/licenses/by-sa/4.0</dc:rights></oai_dc:dc>