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Modified T-type topology of three-phase multi-level inverter for photovoltaic systems

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 12 No. 1 (2022)

DOI
10.11591/ijece.v12i1.pp262-268
ISSN
2722-2578, 2088-8708
Published
2022-02-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-sa/4.0

Abstract

In this article, a three-phase multilevel neutral-point-clamped inverter with a modified t-type structure of switches is proposed. A pulse width modulation (PWM) scheme of the proposed inverter is also developed. The proposed topology of the multilevel inverter has the advantage of being simple, on the one hand since it does contain only semiconductors in reduced number (corresponding to the number of required voltage levels), and no other components such as switching or flying capacitors, and on the other hand, the control scheme is much simpler and more suitable for variable frequency and voltage control. The performances of this inverter are analyzed through simulations carried out in the MATLAB/Simulink environment on a three-phase inverter with 9 levels. In all simulations, the proposed topology is connected with R-load or RL-load without any output filter.

Collaboration network of the authors

11 authors · 25 co-authorship links · 6 across different organisations

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  • University of Hassan II Casablanca
  • Université Hassan 1er
  • Affiliation unknown
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
Show as table
Co-authorOrganisationJoint articles
Abdelwahed TouatiUniversity of Hassan II Casablanca3
Radouane MajdoulUniversity of Hassan II Casablanca3
Elhassane AbdelmounimUniversité Hassan 1er3
Mourad ZegrariUniversity of Hassan II Casablanca2
Ayoub AbidaUniversity of Hassan II Casablanca2
Mohamed AboulfatahUniversité Hassan 1er1

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 27 Okt 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>Modified T-type topology of three-phase multi-level inverter for photovoltaic systems</dc:title><dc:creator>Ouchatti, Abderrahmane</dc:creator><dc:creator>Majdoul, Redouane</dc:creator><dc:creator>Moutabir, Ahmed</dc:creator><dc:creator>Taouni, Abderrahim</dc:creator><dc:creator>Touati, Abdelouahed</dc:creator><dc:description>&lt;jats:p&gt;In this article, a three-phase multilevel neutral-point-clamped inverter with a modified t-type structure of switches is proposed. A pulse width modulation (PWM) scheme of the proposed inverter is also developed. The proposed topology of the multilevel inverter has the advantage of being simple, on the one hand since it does contain only semiconductors in reduced number (corresponding to the number of required voltage levels), and no other components such as switching or flying capacitors, and on the other hand, the control scheme is much simpler and more suitable for variable frequency and voltage control. The performances of this inverter are analyzed through simulations carried out in the MATLAB/Simulink environment on a three-phase inverter with 9 levels. In all simulations, the proposed topology is connected with R-load or RL-load without any output filter.&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2022-02-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v12i1.pp262-268</dc:identifier><dc:identifier>10.11591/ijece.v12i1.pp262-268</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 12 No 1 (2022); 262</dc:source><dc:source>2722-2578</dc:source><dc:source>2088-8708</dc:source><dc:relation>http://ijece.iaescore.com/index.php/IJECE/article/viewFile/24450/15313</dc:relation><dc:rights>http://creativecommons.org/licenses/by-sa/4.0</dc:rights></oai_dc:dc>