In a multi-level inverter (MLI), the switching component number effect on volume and reliability is a major concern in on-grid and off-grid applications. The recent trend in MLI, reduced component number of power switches, and capacitors in multi-level inverter topologies have been driven for power conversion. The concept of fault tolerance is not considered in many such configurations; due to this the reliability of the MLI is very low. So now it is a major research concern, to develop a strong fault resilient ability power electronic converter. In this work, a novel configuration of a multilevel inverter with a lower switch count is proposed and analyzed with fault tolerance operation for improvement of reliability. Generally, the fault-tolerant operation is analyzed in only any one of the switches in MLI. But the proposed topology is concerned with multiple switch fault tolerance. Further, the phase disposition pulse width modulation (PDPWM) control scheme is utilized for the operation of the proposed inverter topology. The proposed inverter topology is simulated in MATLAB/Simulink environment under normal and faulty condition; the results are obtained and validated.
Collaboration network of the authors
5 authors ·
6 co-authorship links
· 4 across different organisations
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Lovely Professional University
Kakatiya University
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