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Fault tolerant nine-level inverter topology for solar water pumping applications

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 12 No. 4 (2022)

DOI
10.11591/ijece.v12i4.pp3485-3493
ISSN
2722-2578, 2088-8708
Published
2022-08-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-sa/4.0

Abstract

Diminished voltage pressure and occasional-general harmonic distortion are the essential causes for such a ways and extensive usage of multi-level inverters (MLIs) in numerous industrial applications. Nonetheless, unwavering quality is one of the significant worries of MLIs as it utilizes countless switches as contrasted to 2-level inverters. Here, a fault tolerant 9-level inverter setup for the use of photovoltaic (PV) system-water pumping applications is suggested. This fault tolerant 9-level inverter is accomplished by combining a 2-level inverter, a 3-level fault tolerant inverter alongside switches with bidirectional ability. The setup is taken care of with four PV fed sources. The arrangement suggested shows the behavior towards switch fault in at least one inverter legs under open circuit conditions. On account of source failure, it could use the better hotspot for introducing continuous power to the water pumping motor. Meanwhile, the suggested fault-tolerant inverter works as seven-level inverter. The activity related to proposed inverter in the course of various failure modes is mentioned and simulated the usage of MATLAB/Simulink.

Collaboration network of the authors

5 authors · 6 co-authorship links · 4 across different organisations

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  • Lovely Professional University
  • Kakatiya University
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
Show as table
Co-authorOrganisationJoint articles
Pavan Kumar ChillappagariLovely Professional University1
Madhukar Rao AirineniKakatiya University1

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 27 Okt 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>Fault tolerant nine-level inverter topology for solar water pumping applications</dc:title><dc:creator>Rao Mucherla, Narasimha</dc:creator><dc:creator>Karthick, Nagaraj</dc:creator><dc:creator>Rao, Airineni Madhukar</dc:creator><dc:description>&lt;jats:p&gt;&amp;lt;span&amp;gt;Diminished voltage pressure and occasional-general harmonic distortion are the essential causes for such a ways and extensive usage of multi-level inverters (MLIs) in numerous industrial applications. Nonetheless, unwavering quality is one of the significant worries of MLIs as it utilizes countless switches as contrasted to 2-level inverters. Here, a fault tolerant 9-level inverter setup for the use of photovoltaic (PV) system-water pumping applications is suggested. This fault tolerant 9-level inverter is accomplished by combining a 2-level inverter, a 3-level fault tolerant inverter alongside switches with bidirectional ability. The setup is taken care of with four PV fed sources. The arrangement suggested shows the behavior towards switch fault in at least one inverter legs under open circuit conditions. On account of source failure, it could use the better hotspot for introducing continuous power to the water pumping motor. Meanwhile, the suggested fault-tolerant inverter works as seven-level inverter. The activity related to proposed inverter in the course of various failure modes is mentioned and simulated the usage of MATLAB/Simulink.&amp;lt;/span&amp;gt;&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2022-08-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v12i4.pp3485-3493</dc:identifier><dc:identifier>10.11591/ijece.v12i4.pp3485-3493</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 12 No 4 (2022); 3485</dc:source><dc:source>2722-2578</dc:source><dc:source>2088-8708</dc:source><dc:relation>http://ijece.iaescore.com/index.php/IJECE/article/viewFile/26421/15751</dc:relation><dc:rights>http://creativecommons.org/licenses/by-sa/4.0</dc:rights></oai_dc:dc>