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Rectangular microstrip antenna design with multi-slotted patch and partial grounding for performance enhancement

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 12 No. 4 (2022)

DOI
10.11591/ijece.v12i4.pp3859-3868
ISSN
2722-2578, 2088-8708
Published
2022-08-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-sa/4.0

Abstract

This paper presents design of a rectangular microstrip patch antenna by using multi-slotted patch and partial grounding plane techniques for both the gain and bandwidth enhancement at the same time. The antenna is designed and simulated for ultra-wideband (UWB) applications using a high frequency structure simulator (HFSS) on FR4_epoxy substrate having a size of 30×20 mm with a dielectric permittivity of 4.4, a tangent loss of 0.02, and a thickness of 0.8 mm and excited by a simple 50 Ω microstrip feed line. The simulation results show that the antenna attains an improved gain of 8.06 dB with a wider impedance bandwidth of 19.7 GHz ranges from 3.15 to 22.85 GHz. The antenna also achieves an efficiency of 96.83% with a return loss of -28.35 dB, and a directivity of 9.39 dB within the entire frequency range. These results imply that the deployment of multi-slotted patch and partial grounding techniques in designing a rectangular microstrip patch antenna is effective in improving its performance.

Collaboration network of the authors

6 authors · 9 co-authorship links · 5 across different organisations

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  • University of Rajshahi
  • Comilla University
  • Port City International University
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
Show as table
Co-authorOrganisationJoint articles
Maqsudur RahmanComilla University1
Md. Tofael AhmedComilla University1
Shafayet NurPort City International University1

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 1 Nov 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>Rectangular microstrip antenna design with multi-slotted patch and partial grounding for performance enhancement</dc:title><dc:creator>Firoz Ahmed, Md</dc:creator><dc:creator>Muhammad Touhidul Islam, Abu Zafor</dc:creator><dc:creator>Hasnat Kabir, Md</dc:creator><dc:description>&lt;jats:p&gt;&amp;lt;span&amp;gt;This paper presents design of a rectangular microstrip patch antenna by using multi-slotted patch and partial grounding plane techniques for both the gain and bandwidth enhancement at the same time. The antenna is designed and simulated for ultra-wideband (UWB) applications using a high frequency structure simulator (HFSS) on FR4_epoxy substrate having a size of 30×20 mm with a dielectric permittivity of 4.4, a tangent loss of 0.02, and a thickness of 0.8 mm and excited by a simple 50 Ω microstrip feed line. The simulation results show that the antenna attains an improved gain of 8.06 dB with a wider impedance bandwidth of 19.7 GHz ranges from 3.15 to 22.85 GHz. The antenna also achieves an efficiency of 96.83% with a return loss of -28.35 dB, and a directivity of 9.39 dB within the entire frequency range. These results imply that the deployment of multi-slotted patch and partial grounding techniques in designing a rectangular microstrip patch antenna is effective in improving its performance.&amp;lt;/span&amp;gt;&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2022-08-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v12i4.pp3859-3868</dc:identifier><dc:identifier>10.11591/ijece.v12i4.pp3859-3868</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 12 No 4 (2022); 3859</dc:source><dc:source>2722-2578</dc:source><dc:source>2088-8708</dc:source><dc:relation>http://ijece.iaescore.com/index.php/IJECE/article/viewFile/26416/15788</dc:relation><dc:rights>http://creativecommons.org/licenses/by-sa/4.0</dc:rights></oai_dc:dc>