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Field programmable gate array implementation of multiwavelet transform based orthogonal frequency division multiplexing system

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 12 No. 5 (2022)

DOI
10.11591/ijece.v12i5.pp5136-5144
ISSN
2722-2578, 2088-8708
Published
2022-10-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-sa/4.0

Abstract

This article offers an efficient design and implementation of a discrete multiwavelet critical-sampling transform based orthogonal frequency division multiplexing (DMWCST-OFDM) transceiver using field programmable gate array (FPGA) platform. The design uses 16-point discrete multiwavelet critical-sampling transform (DMWCST) and its inverse as main processing modules. All modules were designed using a part of Vivado ® Design Suite version (2015.2), which is Xilinx system generator (XSG), and is compatible with MATLAB Simulink version R2013b. The FPGA implementation is carried out on a Zynq (XC7Z020-1CLG484) evaluation board with joint test action group (JTAG) hardware co-simulation. According to the results obtained from the implementation tools, the implemented system is efficient in terms of resource utilization and could support the real-time operations.

Collaboration network of the authors

7 authors · 12 co-authorship links · 5 across different organisations

Hover or tap a name to highlight its co-authors. Double-click to open the author's page.

  • Mustansiriyah University
  • Ninevah University
  • Cihan University Sulaimaniya
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
Show as table
Co-authorOrganisationJoint articles
Fahad Layth MalallahNinevah University1
Nidaa Hasan AbbasMustansiriyah University1
Mustafa Ghanem SaeedCihan University Sulaimaniya1

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 27 Okt 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>Field programmable gate array implementation of multiwavelet transform based orthogonal frequency division multiplexing system</dc:title><dc:creator>Hadi, Suha Qasim</dc:creator><dc:creator>Jafaar, Awatif Ali</dc:creator><dc:creator>Alameri, Ban Mohammed</dc:creator><dc:creator>Malallah, Sarah Ameer</dc:creator><dc:description>&lt;jats:p&gt;This article offers an efficient design and implementation of a discrete multiwavelet critical-sampling transform based orthogonal frequency division multiplexing (DMWCST-OFDM) transceiver using field programmable gate array (FPGA) platform. The design uses 16-point discrete multiwavelet critical-sampling transform (DMWCST) and its inverse as main processing modules. All modules were designed using a part of Vivado&amp;lt;sup&amp;gt;®&amp;lt;/sup&amp;gt; Design Suite version (2015.2), which is Xilinx system generator (XSG), and is compatible with MATLAB Simulink version R2013b. The FPGA implementation is carried out on a Zynq (XC7Z020-1CLG484) evaluation board with joint test action group (JTAG) hardware co-simulation. According to the results obtained from the implementation tools, the implemented system is efficient in terms of resource utilization and could support the real-time operations.&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2022-10-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v12i5.pp5136-5144</dc:identifier><dc:identifier>10.11591/ijece.v12i5.pp5136-5144</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 12 No 5 (2022); 5136</dc:source><dc:source>2722-2578</dc:source><dc:source>2088-8708</dc:source><dc:relation>https://ijece.iaescore.com/index.php/IJECE/article/viewFile/27793/15941</dc:relation><dc:rights>http://creativecommons.org/licenses/by-sa/4.0</dc:rights></oai_dc:dc>