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A microsystem design for controlling a DC motor by pulse width modulation using MicroBlaze soft-core

International Journal of Electrical and Computer Engineering (IJECE) · Vol. 13 No. 2 (2023)

DOI
10.11591/ijece.v13i2.pp1437-1448
ISSN
2722-2578, 2088-8708
Published
2023-04-01
Publisher
Institute of Advanced Engineering and Science
License
creativecommons.org/licenses/by-sa/4.0

Abstract

This paper proposes a microsystem based on the field programmable gate arrays (FPGA) electronic board. The preliminary objective is to manipulate a programming language to achieve a control part capable of controlling the speed of electric actuators, such as direct current (DC) motors. The method proposed in this work is to control the speed of the DC motor by a purely embedded architecture within the FPGA in order to reduce the space occupied by the circuit to a minimum and to ensure the reliability of the system. The implementation of this system allows the embedded MicroBlaze processor to be installed side by side with its memory blocks provided by Xilinx very high-speed integrated circuit (VHSIC) hardware description language (VHDL), Embedded C. The control signal of digital pulse-width modulation pulses is generated by an embedded block managed by the same processor. This potential application is demonstrated by experimental simulation on the Vertix5 FPGA chip.

Collaboration network of the authors

14 authors · 50 co-authorship links

Hover or tap a name to highlight its co-authors. Double-click to open the author's page.

  • Université Ibn-Tofail
  • Affiliation unknown
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
Show as table
Co-authorOrganisationJoint articles
Khalid MateurUniversité Ibn-Tofail7
Abdelkader MezouariUniversité Ibn-Tofail7
Rachid El GouriUniversité Ibn-Tofail4
R. ElgouriUniversité Ibn-Tofail3
Mohammed IgouzalUniversité Ibn-Tofail3
Amal SatifAffiliation unknown2
Omar ElkhoundafiUniversité Ibn-Tofail1

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

This record comes from Crossref (what the publisher deposited), because the journal's own OAI-PMH endpoint could not be harvested.

Metadata source: Crossref API (cadangan, berdasarkan ISSN) https://api.crossref.org/journals/2088-8708/works, first harvested 27 Okt 2026, last seen 1 Nov 2026.
Metadata as oai_dc, converted from Crossref
<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/"><dc:title>A microsystem design for controlling a DC motor by pulse width modulation using MicroBlaze soft-core</dc:title><dc:creator>Zemmouri, Abdelkarim</dc:creator><dc:creator>Barodi, Anass</dc:creator><dc:creator>Dahou, Hamad</dc:creator><dc:creator>Alareqi, Mohammed</dc:creator><dc:creator>Elgouri, Rachid</dc:creator><dc:creator>Hlou, Laamari</dc:creator><dc:creator>Benbrahim, Mohammed</dc:creator><dc:description>&lt;jats:p&gt;This paper proposes a microsystem based on the field programmable gate arrays (FPGA) electronic board. The preliminary objective is to manipulate a programming language to achieve a control part capable of controlling the speed of electric actuators, such as direct current (DC) motors. The method proposed in this work is to control the speed of the DC motor by a purely embedded architecture within the FPGA in order to reduce the space occupied by the circuit to a minimum and to ensure the reliability of the system. The implementation of this system allows the embedded MicroBlaze processor to be installed side by side with its memory blocks provided by Xilinx very high-speed integrated circuit (VHSIC) hardware description language (VHDL), Embedded C. The control signal of digital pulse-width modulation pulses is generated by an embedded block managed by the same processor. This potential application is demonstrated by experimental simulation on the Vertix5 FPGA chip.&lt;/jats:p&gt;</dc:description><dc:publisher>Institute of Advanced Engineering and Science</dc:publisher><dc:date>2023-04-01</dc:date><dc:type>info:eu-repo/semantics/article</dc:type><dc:format>application/pdf</dc:format><dc:identifier>https://doi.org/10.11591/ijece.v13i2.pp1437-1448</dc:identifier><dc:identifier>10.11591/ijece.v13i2.pp1437-1448</dc:identifier><dc:source>International Journal of Electrical and Computer Engineering (IJECE); Vol 13 No 2 (2023); 1437</dc:source><dc:source>2722-2578</dc:source><dc:source>2088-8708</dc:source><dc:relation>https://ijece.iaescore.com/index.php/IJECE/article/viewFile/28170/16343</dc:relation><dc:rights>http://creativecommons.org/licenses/by-sa/4.0</dc:rights></oai_dc:dc>