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Thermal oxidation improvement in semiconductor wafer fabrication

International Journal of Power Electronics and Drive Systems · Vol. 10 No. 3 (2019) · pp. 1141–1147

DOI
10.11591/ijpeds.v10.i3.pp1141-1147
ISSN
2722-256X, 2088-8694
Published
2019-09-01
Publisher
Institute of Advanced Engineering and Science
Language
eng
License
creativecommons.org/licenses/by-sa/4.0

Abstract

Thermal oxidation is a process done to grow a layer of oxide on the surface of a silicon wafer at elevated temperatures to form silicon dioxide. Usually, it en- counters instability in oxide growth and results in variation in the oxide thickness formed. This leads to downtime of furnace and wafer scrap. This study focuses on the factors leading to this phenomenon and finding the optimum settings of these factors. The factors that cause instability to oxide thickness were narrowed down to location of wafer in furnace, oxidation time, gas flow rate and temperature. Characterization and optimization were done using Design of Experiments. Full factorial design was implemented using 4 factors and 2 levels, resulting in 16 runs. Data analysis was done using Multiple Regression Analysis in JMP software. Actual versus predicted plot is examined to determine whether the model fit is significant. Adjusted R2 value was obtained at 99.8% or 0.998 indicating that there is very minimal variation of the data not explained by the model and thus confirming that the model is good. From the effect test, the factors were narrowed down from 4 factors to 3 factors. Location factor was found to have no impact. Significant factors that have impact are gas flow rate, oxidation time and temperature. Analyzing the leverage plots and least square mean plots, temperature was found to have the highest impact on oxide thickness. The model was further analyzed using prediction profiler in JMP to find the optimum settings for thermal oxidation process to meet the target oxide thickness of 8000A. Optimum setting for temperature was found to be at 958 C, gas flow rate at low flow rate (H2:6.5 slm and O2:4.5 slm), oxidation time at 280 min and location of wafers at both zone 1 and zone 2.

Collaboration network of the authors

40 authors · 227 co-authorship links · 92 across different organisations · showing the 40 most connected

Hover or tap a name to highlight its co-authors. Double-click to open the author's page.

  • University of Technology Malaysia
  • Glasgow Caledonian University
  • Jubail Industrial College
  • Robert Gordon University
  • University of Kuala Lumpur
  • Universidad Técnica Federico Santa María
  • Tun Hussein Onn University of Malaysia
  • Other organisations
  • Affiliation unknown
  • Different organisations
  • Same organisation
  • Affiliation unknown
  • Thicker line = more joint articles · bigger circle = more articles
Show as table
Co-authorOrganisationJoint articles
Abdullahi Abubakar Mas’udJubail Industrial College8
Firdaus Muhammad‐SukkiRobert Gordon University7
Mohd Nabil MuhtazaruddinUniversity of Technology Malaysia7
Siti Hawa Abu-BakarUniversity of Kuala Lumpur4
Jorge Alfredo Ardila ReyUniversidad Técnica Federico Santa María4
Nazmi SellamiAffiliation unknown3
Jasrul Jamani JamianUniversity of Technology Malaysia2
Z Abdul-MalekUniversity of Technology Malaysia2
Kamilia KamardinUniversity of Technology Malaysia2
Hamza AhmadTun Hussein Onn University of Malaysia2
Abu Bakar MunirUniversity of Malaya2
Firdaus Muhammad SukkiAffiliation unknown2
Siti Hawa Abu BakarAffiliation unknown2
Zulkurnain Abdul‐MalekUniversity of Technology Malaysia2
Siti Armiza Mohd ArisUniversity of Technology Malaysia2
Siti Zura A. JalilUniversity of Technology Malaysia2
Sharipah Alwiah Syed Abd RahamanUniversity of Technology Malaysia2
Daria FreierGlasgow Caledonian University1
Roberto Ramírez-ÍñiguezGlasgow Caledonian University1
Tapas Kumar MallickUniversity of Exeter1
Siti Hajar Mohd YasinUniversiti Teknologi MARA1
Siti Sarah Abu-BakarKing's College London1
Jonas TaverneAffiliation unknown1
Ahmad Syahir AyubAffiliation unknown1
Draco IyiAffiliation unknown1
Ridoan KarimAffiliation unknown1
Abdullahi Abubakar Mas’udAffiliation unknown1
Mu’azu Mohammed AbdullahiAffiliation unknown1
Ibrahim Abubakar Mas’udAffiliation unknown1
Jorge Alfredo Ardila-ReyAffiliation unknown1
Ahmad Shakir Mohd SaudiAffiliation unknown1
Asan Vernyuy WirbaAffiliation unknown1
Mohd Alif Saifuddin JamalludinAffiliation unknown1
Fadzliana RamleeAffiliation unknown1

Affiliations come from OpenAlex; journal OAI-PMH metadata carries none. Authors without an OpenAlex ID are matched by name, which can merge or split people.

Metadata source: OAI-PMH (metadata jurnal) http://ijpeds.iaescore.com/index.php/IJPEDS/oai, first harvested 8 Nov 2026, last seen 8 Nov 2026.
Original metadata (oai_dc)
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	<dc:title xml:lang="en-US">Thermal oxidation improvement in semiconductor wafer fabrication</dc:title>
	<dc:creator>Mahandran, Christopher Julian</dc:creator>
	<dc:creator>Fatah, Abdul Yasser Abd</dc:creator>
	<dc:creator>Bani, Nurul Aini</dc:creator>
	<dc:creator>Kaidi, Hazilah Mad</dc:creator>
	<dc:creator>Muhtazaruddin, Mohd Nabil Bin</dc:creator>
	<dc:creator>Amran, Mohd Effendi</dc:creator>
	<dc:description xml:lang="en-US">Thermal oxidation is a process done to grow a layer of oxide on the surface of a silicon wafer at elevated temperatures to form silicon dioxide. Usually, it en- counters instability in oxide growth and results in variation in the oxide thickness formed.  This leads to downtime of furnace and wafer scrap.  This study focuses on the factors leading to this phenomenon and finding the optimum settings of these factors. The factors that cause instability to oxide thickness were narrowed down to location of wafer in furnace, oxidation time, gas flow rate and temperature. Characterization and optimization were done using Design of Experiments. Full factorial design was implemented using 4 factors and 2 levels, resulting in 16 runs. Data analysis was done using Multiple Regression Analysis in JMP software. Actual versus predicted plot is examined to determine whether the model fit is significant. Adjusted R2 value was obtained at 99.8% or 0.998 indicating that there is very minimal variation of the data not explained by the model and thus confirming that the model is good. From the effect test, the factors were narrowed down from 4 factors to 3 factors. Location factor was found to have no impact. Significant factors that have impact are gas flow rate, oxidation time and temperature. Analyzing the leverage plots and least square mean plots, temperature was found to have the highest impact on oxide thickness. The model was further analyzed using prediction profiler in JMP to find the optimum settings for thermal oxidation process to meet the target oxide thickness of 8000A. Optimum setting for temperature was found to be at 958 C, gas flow rate at low flow rate (H2:6.5 slm and O2:4.5 slm), oxidation time at 280 min and location of wafers at both zone 1 and zone 2.</dc:description>
	<dc:publisher xml:lang="en-US">Institute of Advanced Engineering and Science</dc:publisher>
	<dc:contributor xml:lang="en-US"></dc:contributor>
	<dc:date>2019-09-01</dc:date>
	<dc:type>info:eu-repo/semantics/article</dc:type>
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	<dc:format>application/pdf</dc:format>
	<dc:identifier>https://ijpeds.iaescore.com/index.php/IJPEDS/article/view/19857</dc:identifier>
	<dc:identifier>10.11591/ijpeds.v10.i3.pp1141-1147</dc:identifier>
	<dc:source xml:lang="en-US">International Journal of Power Electronics and Drive Systems (IJPEDS); Vol 10, No 3: September 2019; 1141-1147</dc:source>
	<dc:source>2722-256X</dc:source>
	<dc:source>2088-8694</dc:source>
	<dc:source>10.11591/ijpeds.v10.i3</dc:source>
	<dc:language>eng</dc:language>
	<dc:relation>https://ijpeds.iaescore.com/index.php/IJPEDS/article/view/19857/12836</dc:relation>
	<dc:rights xml:lang="en-US">Copyright (c) 2019 Christopher Julian Mahandran, Abdul Yasser Abd Fatah, Nurul Aini Bani, Hazilah Mad Kaidi, Mohd Nabil Bin Muhtazaruddin, Mohd Effendi Amran</dc:rights>
	<dc:rights xml:lang="en-US">http://creativecommons.org/licenses/by-sa/4.0</dc:rights>
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